HPC workshop on heterogeneous architectures with SYCL / INTEL ONEAPI
Ecole Polytechnique - Aile 0 - Ground Floor
HPC workshop on heterogeneous architectures with SYCL / INTEL ONEAPI
Purpose of workshop
Take advantage of architectures with new programming paradigms
In recent years computation has been exposed to a widely growing heterogeneity of the types of used devices and their manufacturers. This trend is driven by the specialisation of devices to fit the needs of specific workloads, which in turn is the strategy to satisfy the ever-growing demand in compute power. Heterogeneity is present in both high-performance computing and consumer electronics. Today's systems use a multitude of co-processors and accelerators, such as GPUs, TPUs, and FPGAs, in addition to the traditional CPU.
However, there isn't a simple, portable and efficient method to develop for these systems. Intel oneAPI (SYCL implementation) aims to fill this role.
Getting the maximum achievable performance out of today’s hardware is a fine balance between optimal use of underlying hardware features and using code that is portable, easily maintainable, and power-efficient. These factors don't necessarily work in tandem. They require prioritizing based on user needs. It's non-trivial for users to maintain separate code bases for different architectures. A standard, simplified programming model that can run seamlessly on scalar, vector, matrix, and spatial architectures will give developers greater productivity through increased code reuse and reduced training investment.
Improve yours Artificial Intelligence workflows
For years Intel has been developing tools and approaches to help Data Scientists and AI practitioners solve their everyday problems and accelerate the standard workflows. Come and see how Intel hardware has evolved to include specific features to accelerate AI workloads, including classical machine learning and Deep Learning. Learn how to make your existing AI code run faster on the CPU by using Intel tools and techniques. Discover how to improve your workflows and security
People
Researchers and engineers with HPC knowledge
Duration
- 4 days with custom-made sessions training (you choose)
- indicative timetable here
Venue
Ecole Polytechnique / Palaiseau
Registration
- Open for plenary session on morning, monday 28 (30 persons max.)
- Mandatory for all others sessions (15 persons max / session)
Even if you have been offered to register for each half-day (session), it is preferable to register for the full day (morning and afternoon session) on Tuesday, Wednesday and Thursday.
Click here to proceed to registration.
Prerequisites
Knowledge : The workshop aims at participants who are familiar with the C/C++ or Fortran programming languages and have working experience with the Linux operating system and the use of the command line. Experience with parallel programming is required.
Hardware : bring your laptop with vscode
Course language is French.
Speakers
- Intel engineers
- TriScale Innov engineers